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   t he i nfinite p ower of i nnovation l in f inity m icroelectronics i nc . 11861 w estern a venue , g arden g rove , ca. 92841, 714-898-8121, f ax : 714-893-2570 1 copyright ? 2001 rev. 1.5, 2001-02-13   ? lx5241/5242/5243    
 
 

the lx5241/42/43 is a multim ode scsi terminator that is compatible with to the scsi spi02 (ultra2 scsi), scsi spi-3 (ultra3 scsi or ultra160 scsi), and p ending scsi spi-4 (ultra320) specifications developed by the t10 standards committee for low voltage differential (lvd) termination, while providing backwards compatibility to the scsi, scsi-2, and spi single- ended specifications. mu ltim ode compatib ility permits the use of legacy devices on the bus without hardware alterations. automatic mode selection is achieved through voltage detection on the diffsense line. the lx5241/42/43 utilizes linfinitys ultramax technology which delivers the u ltimate in scsi bus performance while saving component cost and board area. elimination of the external capacitors also mitigates the need for a lengthy capacitor selection process. the individual high bandwidth drivers also maximize channel separation and reduce channel to channel noise and cross talk. the high bandwidth architecture insures ultra2 performance while providing a clear migration path to ultra3 and beyond. when the lx 5241/42/43 is enabled, the differential sense (diffsense) pin supplies a voltage between 1.2v and 1.4v. in application this pin is tied to the diffsense input of the corresponding lvd transceivers. this action enables the lvd transceiver function. diffsense is capable of supplying a maximum of 15ma. tying the diffsense pin high places the lx5241/42/43 in a hi z state indicating the presence of an hvd device. tying the pin low places the part in a single-ended mode while also signaling the multim ode transceiver to operate in a single-ended mode. recognizing the needs of portable and configurable peripherals, the lx5241/42/43 have a ttl compatible sleep/disable mode. during this sleep/disable mode, power dissipation is reduced to a meager 15ua while also placing all outputs in a hi z state. also during sleep/disable mode, the diffsense function is disabled and is placed in a hi z state. another key feature of the lx5241/42/43 is the master / slave function. driving this pin high or floating the pin enables the 1.3v diffsense reference. driving the pin low disables the on board diffsense reference and enables use of an external master reference device. important: for the most current data, consult microsemi s website: http://www.microsemi.com      auto-selectable lvd or single- ended termination  3.0pf maximum disabled output capacitance  fast response, no external capacitors required  compatible with active negation drivers  15a supply current in disconnect mode  logic command disconnects all termination lines  diffsense line driver  ground driver integrated for single-ended operation  current limit and thermal protection  hot-swap compatible (single- ended)  ultra160 compliant  see lx5245/5246 for lvd termination only  pin compatible with ds2119 and ucc5630       b us v oltage 6 v od v (+) v (-) v cm 0v -100mv 100mv v od = v (-) - v (+) , logic = 0 negated lx5241 lx5241 + - + -  
  t a ( c) db plastic tssop 36-pin pw plastic tssop 24-pin pw plastic tssop 28-pin LX5241CDB lx5241cpw lx5243cpw 0 to 70 lx5242cdb lx5242cpw - note: available in tape & reel. append the letter t to the part number. (i.e. LX5241CDBt)
m u l timode scsi t ermin a tor lx5241/5242/5243 product d a t abook 1996/1997 copyright ? 200 1 rev. 1.5 02/13 2 p roduction d at a s heet ultramax termpwr voltag e ................................................................................................ . +7v operating junction temperature plastic (db, pw packages ) ......................................................................... . 150c storage temperature rang e ............................................................. . -65c to 150c lead temperature (soldering, 10 seconds ) ................................................... . 300c note 1 . exceeding these ratings could cause damage to the device. all voltages are with respect to ground. currents are positive into, negative out of the specified terminal. db package: thermal resistance-junction to ambient , ja 50c/w pw package: thermal resistance-junction to ambient , ja 100c/w junction temperature calculation: t j = t a + (p d x ja ). the ja numbers are guidelines for the thermal performance of the device/pc-board system. all of the above assume no ambient airflow. thermal d a t a absolute maximum r a ting s (note 1) p a ckage pin outs db package ( top view) lx5241/5242 ("n.c." = no internal connection) n.c. n.c. n.c. 1+ 1- 2+ 2- heatsink heatsink heatsink 3+ 3- 4+ 4- 5+ 5- disconnect gnd v term hvd lvd se 9- 9+ 8- 8+ heatsink heatsink heatsink 7- 7+ 6- 6+ diff b diffsense master/slave 1 3 6 2 3 5 3 3 4 4 3 3 5 3 2 631 7 3 0 8 2 9 9 2 8 10 2 7 11 26 12 25 13 24 14 23 1 5 22 1621 1 7 2 0 1 8 1 9 lx5241/5243 lx5242 diff outputs quiescent disconnec t disconnect sense status type current l h l < 0.5v enable s.e. 7ma l h 0.7 - 1.9v enable lvd 21ma l h h > 2.4v disable hi z 1ma hl x disable hi z 10a open open diffsense / p owe r u p / p ower d ow n f unction t able master / diffsense slave status l* hi z 0ma h 1.3v 15ma source open (pull-up) 1.3v 15ma source master / slave f unction t able * when in low state, terminator will detect state of diffsense line. pw package (top view) lx5241/5242 ("n.c." = no internal connection) v term n.c. 9- 9+ 8- 8+ 7- 7+ 6- 6+ diffsense master/slave 1 2 4 2 2 3 3 2 2 4 2 1 5 2 0 619 7 1 8 8 1 7 9 1 6 10 15 11 1 4 12 1 3 1+ 1- 2+ 2- 3+ 3- 4+ 4- 5+ 5- disconnect gnd pw package (top view) lx5243 ("n.c." = no internal connection) v term n.c. 9- 9+ 8- 8+ n.c. 7- 7+ 6- 6+ diffb diffsense master/slave 1 2 8 2 2 7 3 2 6 4 2 5 5 2 4 623 7 2 2 8 2 1 9 2 0 10 19 11 18 12 17 13 16 14 1 5 n.c. 1+ 1- 2+ 2- n.c. 3+ 3- 4+ 4- 5+ 5- disconnect gnd
m u l timode scsi t ermin a tor lx5241/5242/5243 product d a t abook 1996/1997 3 copyright ? 200 1 rev. 1. 5 02 / 13 p roduction d at a s heet ultramax termpwr supply current s e i cc all term lines = open, master/slave = 0v all term lines = 0.2v, master/slave = 0v lx5241/5243: disconnect > 2.0v, lx5242: disconnect < 0.8v terminator output high volt v o output current i o v out = 0.2v sink current i sink v out = 4v, all lines output capacitance c o lx5241/5243: disconnect > 2.0v, lx5242: disconnect < 0.8v leakage current i leak lx5241/5243: disconnect > 2.0v, lx5242: disconnect < 0.8v, v out = 0 to 4v, t a = 25c lx5241/5243: disconnect > 2.0v, lx5242: disconnect < 0.8v, v term = open, v line = 2.7v, t a = 25c termpwr voltage lvd v term se signal line voltage disconnect input voltage operating virtual junction temperature range lx5241c / 5242c / 5243c 3.0 5.25 v 3.5 5.25 v 0 5 . 0 v 0v term v 0 7 0 c recommended oper a ting conditions (note 2) parameter symbol units recommended operating conditions min. typ. max. electrical characteristics (unless otherwise specified, these specifications apply over the operating ambient temperature range of 0c t a 70c, termpwr = 4.75v. for the lx5241/5243 disconnect = l, for the lx5242 disconnect = h. low duty cycle pulse testing techniques are used which maintains junction and case temperatures equal to the ambient temperature.) parameter symbol test conditions units lx5241 / 5242 / 5243 min. typ. max. 25 30 m a 15 35 a 1.125 1.25 1.375 v 100 112 125 m v 100 105 110 ? 100 200 300 ? 2.5 p f 2 a 1 a 115 m s lvd terminator section termpwr supply current lv d i cc all term lines = open lx5241/5243: disconnect > 2.0v, lx5242: disconnect < 0.8v common mode voltage v cm offset voltage v fsb open circuit between - and + (see note 3) differential terminator impedance z d v out differential = -1v to 1v common mode impedance z cm 0v to 2.5v output capacitance c o lx5241/5243: disconnect > 2.0v, lx5242: disconnect < 0.8v output leakage i leak lx5241/5243: disconnect > 2.0v, lx5242: disconnect < 0.8v, v line = 0 to 4v, t a = 25c lx5241/5243: disconnect > 2.0v, lx5242: disconnect < 0.8v, v term = 0v, v line = 2.7v mode change delay t df diffsense = 1.4v to 0v 7 1 0 m a 214 226 m a 15 35 a 2.6 2.85 v 21 23 24 m a 45 65 m a 2.5 p f 2 a 1 a single-ended termination section note 2. range over which the device is functional. note 3. open circuit failsafe voltage. diffsense output voltage v diff diffsense output source current i diff v diff = 0v diffsense sink current i sink(diff) v diff = 2.75v diffsense output leakage i leak(diff) lx5241/5243: disconnect > 2.0v, lx5242: disconnect < 0.8v, t a = 25c 1.2 1.3 1.4 v 5.0 15.0 m a 200 a 10 a diffsense section
m u l timode scsi t ermin a tor lx5241/5242/5243 product d a t abook 1996/1997 copyright ? 200 1 rev. 1. 5 0 2 / 13 4 p roduction d at a s heet ultramax block diagram disconnect thresholds v th input current lx5241/43 i il disconnect = 0v lx5242 i il disconnect = 0v lx5241/43 i ih disconnect = 2.4v lx5242 i ih disconnect = 2.4v 0.8 2.0 v 10 a 100 na 100 na 10 a disconnect section master / slave thresholds v th (ms) input current i il (ms) master / slave = 0v i ih (ms) master / slave = 2.4v 0.8 2.0 v 10 a 100 na master / slave section electrical characteristics parameter symbol test conditions units lx5241 / 5242 min. typ. max. ground driver impedance z g i = 1ma thermal shutdown 100 ? 150 c single-ended termination section (continued) figure 1 ? lx5241/5242 block diagram internal v ref 1.30v power on s.e. 2.2v 52.5 52.5 200 window comp. latch power on & mode delay se hvd lvd se hvd lvd power on 10ma v term disconnect m/s diffsense diffb mode control & delay 20 se disc/hvd lvd lvd (+) / s e (pseudo-gnd) lvd (-) / se 1 of 9 se hvd lvd 1.07ma 1.07ma lvd 1.25v se 2.85v, 22.5ma
m u l timode scsi t ermin a tor lx5241/5242/5243 product d a t abook 1996/1997 5 copyright ? 200 1 rev. 1. 5 02 / 13 p roduction d at a s heet ultramax 1-, 2-, 3-, 4-, 5-, 6-, 7-, 8-, 9- 6 negative signal termination lines for lvd mode. signal termination lines for se mode. 1+, 2+, 3+, 4+, 5+, 6+, 7+, 8+, 9 + positive signal termination lines for lvd mode. pseudo-ground lines for se mode. v term power supply pin for terminator. connect to scsi bus termpwr. must be decoupled by one 4.7f low-esr capacitor for every three terminator devices. it is absolutely necessary to connect this pin to the decoupling capacitor through a very low impedance (big traces on pcb). keeping distances very short from the decoupling capacitors to the v term pin is also critical. the value of the decoupling capacitor is somewhat layout dependant and some applications may benefit from high-frequency decoupling with 0.1f capacitors right at v term pin. disconnect 6 enables / disables terminator. see power down function table for logic levels per device. gnd 6 terminator ground pin. connect to ground. master / slave 6 sometimes referred to as m/s pin in this data sheet. used to select which terminator is the control- ling device. master/slave pin high or open enables the diffsense output drive. please see master/slave function table. diffsense 6 this is a dual function pin. it drives the scsi bus diffsens line. it is also the sense pin to detect the scsi bus mode (lvd, se or hvd). diffsense output drive can be disabled with low level on the master/slave pin. please see diffsense and master/slave function tables. internally connected to diffb pin through 20kohm resistor. diffb 6 internally connected to diffsense pin through 20kohm resistor. it can be used as a mode sense pin when the device is a non-controlling terminator (master/slave pin is low). an rc filter (20kohm / 0.1f) is not required on the lx5241/42/43, as it has an internal timer. se 6 single-ended output; when high, terminator is operating in se mode. lvd 6 low voltage differential output. when high, terminator is operating in lvd mode. hvd 6 high voltage differential output. when high, terminator is operating in hvd mode. heatsink 6 attached to die mounting pad, but not bonded to gnd pin. pins should be considered a heat sink only, and not a true ground connection. it is recommeneded that these pins be connected to ground, but can be left floating. pin designator description functional pin description
m u l timode scsi t ermin a tor lx5241/5242/5243 product d a t abook 1996/1997 copyright ? 200 1 rev. 1. 5 02 / 13 6 p roduction d at a s heet ultramax applic a tion schem a tic        
            
     
     
           
            
     
     
            
           
            
     
     
   

          
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  ! "   1   % &'(5      !  2  $    ) ! 6 $   2 #   7   1  !  1 "  3 8  )   ,  1             ) $ )   ! "     !   " 9-  " 3, ( , . /  ( , . /  ultramax is a trademark of linfinity microelectronics inc. preliminary data - information contained in this document is pre-production data, and is proprietary to linfinity. it may not modified in any way without the express written consent of linfinity. product referred to herein is offered in sample form only, and linfinity reserves the right to change or discontinue this proposed product at any time. figure 3 ? suggested linfinity lx5241/5242/5243 universal application schematic (please reference manufacturer's current data sheet to ensure compatibility)


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